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国家高技术研究发展计划(2008AA010708)

作品数:3 被引量:0H指数:0
相关作者:井光超李冬梅更多>>
相关机构:清华大学更多>>
发文基金:国家高技术研究发展计划国家自然科学基金更多>>
相关领域:电子电信自动化与计算机技术更多>>

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A lower power reconfigurable multi-band transceiver for short-range communication
2013年
A reconfigurable multi-mode multi-band transceiver for low power short-range wireless communication applications is presented. Its low intermediate frequency (IF) receiver with 3 MHz IF carrier frequency and the direct-conversion transmitter support reconfigurable signal bandwidths from 250 kHz to 2 MHz and support a highest data rate of 3 Mbps for MSK modulation. An integrated multi-band PLL frequency synthesizer is utilized to provide the quadrature LO signals from about 300 MHz to 1 GHz for the transceiver multi-band application. The transceiver has been implemented in a 0.18 μm CMOS process. The measurement results at the maximum gain mode show that the receiver achieves a noise figure (NF) of 4.9/5.5 dB and an input 3rd order intermodulation point (IIP3) of-19.6/-18.2 dBm in 400/900 MHz band. The transmitter working in 400/900 MHz band can deliver 10.2/7.3 dBm power to a 50 Ω load. The transceiver consumes 32.9/35.6 mW in receive mode and 47.4/50.1 mW in transmit mode in 400/900 MHz band, respectively.
张凌炜池保勇祁楠刘力源姜汉钧王志华
关键词:TRANSCEIVERRECONFIGURABLEPOWER
A low cost integrated transceiver for mobile UHF passive RFID reader applications
2009年
A low cost integrated transceiver for mobile UHF passive RFID reader applications is implemented in a 0.18-μm CMOS process.The transceiver contains an OOK modulator and a power amplifier in the transmitter chain,an IQ direct-down converter,variable-gain amplifiers,channel-select filters and a 10-bit ADC in the receiver chain.The measured output P1dB power of the transmitter is 17.6 dBm and the measured receiver sensitivity is-70 dBm.The on-chip integer N synthesizer achieves a frequency resolution of 200 kHz with a phase noise of-104 dBc/Hz at 100 kHz frequency offset and-120.83 dBc/Hz at 1 MHz frequency offset.The transmitter,the receiver and the frequency synthesizer consume 201.34,25.3 and 54 mW,respectively.The chip has a die area of 4×2.5 mm2 including pads.
王敬超张春池保勇王自强李福乐王志华
关键词:集成收发器阅读器UHF
一种用于音频系统单环多比特ΔΣ D/A的设计
2009年
在1.8V电压下,使用UMC0.18μm混合信号工艺,设计实现了一个用于音频系统的19位20kHz数模转换器(DAC),其中包括了一个单环多比特Δ∑调制器和一个用于平滑效果的开关电容滤波器(SCF);仿真结果表明,在64倍过采样率、5bit信号量化时,DAC能够实现17.22bit的转换精度,模拟电路部分功耗只有6.9mW,考虑到数字部分,功耗和品质因素(FOM)值P/(2×BW×2ENOB)≤3pJ/step;芯片版图面积约为1.4mm×1.6mm。
井光超李冬梅
关键词:DAC开关电容滤波器FOM
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