The change of P+ deep well doping will affect the charge collection of the active and passive devices in nano-technology,thus affecting the propagated single event transient(SET) pulsewidths in circuits.The propagated SET pulsewidths can be quenched by reducing the doping of P+ deep well in the appropriate range.The study shows that the doping of P+ deep well mainly affects the bipolar amplification component of SET current,and that changing the P+ deep well doping has little effect on NMOS but great effect on PMOS.
Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.
Using Geant4 Monte Carlo code and Technology Computer-Aided Design(TCAD) simulation,energy deposition and charge collection of single event effects(SEE) are studied,which are induced by low-energy protons and α particles in small feature size devices.We analyzed charge collection of SEE especially at Bragg's peak and obtained two types of deposited energy distributions of protons and α particles at different incident energies.The two components of the total charge collected are quantified,which are due to drift current of the space charge region and current in the funnel region separately.Results explain the high soft error rate in experiments of low energy proton.
LIU ZhengCHEN ShuMingLIANG BinLIU BiWeiZHAO ZhenYu
Since single event transient pulse quenching can reduce the SET(single event transient) pulsewidths effectively,the charge collected by passive device should be maximized in order to minimize the propagated SET.From the perspective of the layout and circuit design,the SET pulsewidths can be greatly inhibited by minimizing the layout spacing and signal propagation delay,which sheds new light on the radiation-hardened ICs(integrated circuits) design.Studies show that the SET pulsewidths of propagation are not in direct proportion to the LET(linear energy transfer) of incident particles,thus the defining of the LET threshold should be noted when SET/SEU(single event upset) occurs for the radiation-hardened design.The capability of anti-radiation meets the demand when LET is high but some soft errors may occur when LET is low.Therefore,radiation experiments should be focused on evaluating the LET that demonstrates the worst response to the circuit.
Using Technology Computer-Aided Design(TCAD) 3-D simulation,the single event effect(SEE) of 25 nm raised source-drain FinFET is studied.Based on the calibrated 3-D models by process simulation,it is found that the amount of charge collected increases linearly as the linear energy transfer(LET) increases for both n-type and p-type FinFET hits,but the single event transient(SET) pulse width is not linear with the incidence LET and the increasing rate will gradually reduce as the LET increases.The impacts of wafer thickness on the charge collection are also analyzed,and it is shown that a larger thickness can bring about stronger charge collection.Thus reducing the wafer thickness could mitigate the SET effect for FinFET technology.
Variation of substrate background doping will affect the charge collection of active and passive MOSFETs in complementary metal-oxide semiconductor （CMOS） technologies, which are significant for charge sharing, thus affecting the propagated single event transient pulsewidths in circuits. The trends of charge collected by the drain of a positive channel metal-oxide semiconductor （PMOS） and an N metal-oxide semiconductor （NMOS） are opposite as the substrate doping increases. The PMOS source will inject carriers after strike and the amount of charge injected will irlcrease as the substrate doping increases, whereas the source of the NMOS will mainly collect carriers and the source of the NMOS can also inject electrons when the substrate doping is light enough. Additionally, it indicates that substrate doping mainly affects the bipolar amplification component of a single-event transient current, and has little effect on the drift and diffusion. The change in substrate doping has a much greater effect on PMOS than on NMOS.
Using three-dimensional technology computer-aided design （TCAD） simulation, parasitic bipolar amplification in a single event transient （SET） current of a single transistor and its temperature dependence are studied. We quantify the contributions of different current components in a SET current pulse, and it is found that the proportion of parasitic bipolar amplification in total collected charge is about 30% in both ]30-nm and 90-nm technologies. The temperature dependence of parasitic bipolar amplification and the mechanism of the SET pulse are also investigated and quantified. The results show that the proportion of charge induced by parasitic bipolar increases with rising temperature, which illustrates that the parasitic bipolar amplification plays an important role in the charge collection of a single transistor.
In this paper,we proposed a new n-channel MOS single event transient(SET) mitigation technique,which is called the open guard transistor(OGT) technique.This hardening scheme is compared with several classical n-channel MOS hardening structures through 3-D TCAD simulations.The results show that this scheme presents about 35% improvements over the unhardened scheme for mitigating the SET pulse,and its upgrade,the 2-fringe scheme,takes on even more than 50% improvements over the unhardened one.This makes significant sense for the semi-conductor device reliability.
